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Anyone who has poked around with either building their own hardware, or worse trying to work out what’s wrong with someone else’s, will probably end up getting a logic analyser at some point. It can be very difficult to really understand what is going on inside the circuit without one.

The Open Bench Logic Sniifer is a fairly cheap tool to poke around the state of your circuits. It’s notable for being completely open source – the main capture core is actually an FPGA you can get the source to. The client to use it follows a open protocol, and the clients are all open source as well. But is it any good?

Out of the box the first thing you will end up doing is upgrading the firmware on it. Well, when I say firmware, that also includes the FPGA configuration. Thankfully this process is no harder to complete than applying upgrades to anything else. The board has a PIC MCU implementing a USB bridge between your PC and the capture core, as well as handling updates to the FPGA configuration of the core.

You don’t get any probes with the base board, the yellow wires above are just jumper cables I happen to have (and are just fine for anything on a breadboard). Probes are easy enough to get, although vary considerably in quality. The big problem with most probes is the limit of what they can tap. If you’re using fine-pitch QFP packages good luck finding probes which aren’t insanely expensive, even for 0.8mm pitch which isn’t even as fine as QFP packages go.

Even with more expensive logic analysers you’re probably going to be limited by the probes for what you can tap. Keep this in mind both when you’re designing your own boards and when looking at more pricey options.

As-is the board can capture 16 channels at once, although you can solder on a “wing” to give you another 16 (32 in total). That many channels gives you real flexibility to monitor more than just a couple of serial channels, but busses and a significant number of interactions between components. It’s capable of sample rates up to 200MHz, but keep in mind that this is hugely limited by buffer space.

Some analysers stream data continuously to the host PC. This allows them to sample more or less indefinitely, which can be very useful for boot processes or situations where long interaction is required. But streaming comes at a cost – they are limited in the sample rate they can capture. Conversely, while this board can capture much faster sample rates (24MHz for a “streamed” analyser vs 200MHz for this board) it can’t do so for anywhere near as long. 24k samples at 200MHz is microseconds of coverage. Given that, it’s good it supports on-board triggers for when to start captures.

Do you need 200MHz? Probably not, most microcontroller stuff is going to be clocking around 10-20MHz. However, recent updates to the capture core now provide better duration coverage even with fairly high sample rates, and illustrate the advantage of an updatable FPGA core.

Software-side, the PC clients are mostly cross-platform and do an acceptable enough job. The preferred client has a number of useful interpreters for basic serial types (SPI, I2C, UARTs), although lacks a more capable bus interpreter which would be quite accessible given the number of channels available. The client does need a fair amount of polish, and there does seem to be a lot of active development on it towards that end.

In the end, it’s half the price of any of it’s 8-channel competitors while offering 16 channels out of the box and 32 for minimal extra cost, and being FPGA based can be considerably extended and upgraded with features. On the downsides, the sample rate may be higher than it’s competitors but the sample depth is still lacking, and it lacks the pretty (but ultimately not as useful seems) probes of other kits.